Apply Now

B.Tech Electronics and Communication Engineering (ECE Lateral Entry)

Undergraduate
Duration 3 Years
Brochure (PDF)
Fee Details

Programme Overview

The B.Tech in Electronics and Communication Engineering (Lateral Entry) program is designed for diploma holders aiming to upgrade their qualifications and enter directly into the second year of engineering. The curriculum offers a strong foundation in electronic circuits, communication systems, signal processing, and embedded technologies. Emphasis is placed on practical skills, industry-relevant tools, and innovation-driven learning. This program prepares students for careers in core electronics, telecommunications, embedded systems, automation, and IT sectors. Graduates are also eligible for competitive exams and higher education opportunities in India and abroad..

Specializations Offered

The B.Tech ECE (Lateral Entry) program offers a specialization in VLSI and Embedded Systems OR Communication Systems and enables students to further their expertise in certain areas of electronics and communication.

Program Details

Course name: B.Tech ECE ( Lateral Entry ) ) with specialization in VLSI and Embedded System/ Communication Systems

Duration: 3 yrs. (6 Semesters)

The lateral entry B.Tech ECE is aimed at diploma holders seeking higher qualifications and skill set. The course is delivered over 6 semesters; it provides students with a well established framework for developing technical knowledge and skills of theory and practice associated with electronics and communication engineering.

Labs
Share

Key Educational Benefit

Manav Rachna offers a unique educational experience that combines academic excellence, practical exposure, and industry partnerships to equip students with the skills needed for real-world success.

41,000+

Alumni Imprints Globally

2800+

Published Research Papers

600+

MNC's & Indian Corporate Recruit

250+

Patents (Filed/Granted)

120+

Global Academic Collaborations

80+

Alumni & In-Campus Startups

60+

Countries with Footprints

60 LPA

Highest CTC Offered

Eligibility

The applicants should have obtained a minimum of 45% marks in a 3-year Diploma in Engineering in any discipline/branch from a State Board of Technical Education or an equivalent exam. Or, applicants with B.Sc. degree from a recognized university as per the UGC's definition must have a minimum of 50% marks and must be math graduates at the 10+2 level.

Admission Criteria

Meritorious selection based on performance in the MRNAT exam

Nationality

Indian and foreign candidates can apply for the program.Indian and foreign candidates can apply for the program.

Selection Criteria

According to the above-mentioned admission guidelines.

Scholarship Scheme

Merit scholarship to meritorious students, up to 100% fee concession.

Curriculum

Semester 3

5.0EC101C01 – Electronic Devices

5.0EC102C01 – Digital Electronics

5.0EC103C01 – Signals and Systems

5.0CE100C01 – Data Structures & Algorithms

Explain major concepts of data structures, searching, sorting, and their complexities.
Explain structured data types and their uses.
Implement data structures to practical problems in sorting, searching, and traversal.
Examine complexity of operations in data structures, sorting, and searching.
Critique sorting algorithms under best, average, and worst-case scenarios.
Construct optimal solutions to real-world problems using proper data structures.

5.0EE101C01 – Electrical Circuit & Analysis

5.0CE106C01 – Cyber Law & Ethics

5.0EC151C01 – Electronic Devices Lab

5.0EC152C01 – Digital Electronics Lab

5.0CE151C01 – Data Structures & Algorithms Lab

5.0SET100C05 – Design Thinking and Innovation – I

5.0CDC151C05 – Quantitative Aptitude

5.0EC153C06 – Summer Internship – I

4.5SBSS100C09 – Constitution of India

Semester 4

5.0EC201C01 – Communication Engineering

5.0EC202C01 – Analog Circuits

5.0EC203C01 – Microprocessors & Microcontrollers

5.0EC204C01 – Electromagnetic Waves

5.0CE101C01 – Object Oriented Programming

Define object-oriented programming principles such as streams, classes, functions, data, and objects.
Use dynamic memory management through pointers, constructors, destructors, etc.
Recognize function overloading, operator overloading, virtual functions, and polymorphism.
Classify types of inheritance, binding methods, and application of exception handling and generic programming.
Use file handling through functions and pointers, and exceptions for file-related error handling.
Construct templates and use try-catch blocks for exception handling with throw and re-throw processes.

5.0EC251C01 – Communication Engineering Lab

5.0EC252C01 – Analog Circuits Laboratory

5.0SBSS100C04 – Universal Human Values

5.0SAHS100C09 – Sports and Yoga

5.0EC253C01 – Microprocessors & Microcontrollers Lab

5.0SET200C05 – Design Thinking and Innovation – II

5.0CDC251C05 – QAPD-I

Identify and solve non-verbal reasoning problems.
Solve complicated problems with arithmetic reasoning.
Utilize shortcut methods to resolve verbal reasoning problems.
Employ proper grammar in verbal as well as written expressions.
Promote vocabulary for everyday communication.
Enhance speed in reading and writing exercises.

Semester 5

5.0CE201C01 – Computer Organization & Architecture

Study the functional block diagram of a single-bus architecture of a computer.
Explain instruction execution cycle, RTL interpretation, addressing modes, and instruction set.
Show assembly language programming for 16-bit arithmetic operations and I/O interfacing (ADC, control circuits, serial ports).
Describe concurrent memory access and cache coherence in parallel processing.
Compare CPU organisations and design a memory module interfaced with CPU.
Analyze CPU performance and apply pipelining, parallelism, and RISC design approaches.

5.5EC100C01 – Digital Signal Processing and Its Applications

5.5EC101C01 – Wireless Communication

5.5EC151C01 – Digital Signal Processing and Its Applications Laboratory

5.5EC152C06 – Summer Internship–II

5.5SET149C05 – Entrepreneurship and Startups

5.5SET100C05 – Design Thinking and Innovation–III

5.5CDC152C05 – QAPD-II

Analyze various types of data.
Answer complicated arithmetic reasoning questions.
Apply shortcuts in solving number system questions.
Enrich vocabulary through word consciousness.
Form grammatically correct simple and complex sentences.
Build reading and verbal reasoning competencies.

5.0CE202E02 – Python

Comprehend Python fundamentals like data types, lists, tuples, dictionaries, operators, and functions.
Utilize the Python Program Development Environment (PPDE).
Utilize object-oriented concepts with Python.
Conduct mathematical computing with NumPy and associated libraries.
Develop well-formatted Python programs using logical constructs.
Code and test Python programs via mini-projects.

5.5CE102C01 – Artificial Intelligence

Identify problems solvable using AI techniques.
Explain AI methods and application areas.
Practise knowledge representation and reasoning.
Evaluate AI techniques and learning systems.
Understand knowledge acquisition for expert systems and intelligent agents.
Construct a basic expert system.

5.5EC102E01 – Android

5.5EC103E01 – Soft Computing Techniques

5.0CE203C01 – Database Management Systems

Understand DBMS components and architecture.
Describe data models, E-R models, and transaction processing concepts.
Apply key DBMS concepts such as security, integrity, and concurrency.
Use query techniques and relational algebra; optimise queries.
Evaluate schemas using normalisation techniques.
Design and implement a simple DBMS project.

5.0FLFR100E03 – French I

5.0FLGR100E03 – German I

Semester 6

5.5EC201C01 – Data Communication and Networking

5.5EC202C05 – Project Phase-I

5.5EE101C01 – Control Systems

5.5CDC252C05 – QAPD-III

Identify problems based on contemporary mathematics and algebra.
Find simple to moderate problems on mensuration and geometry.
Calculate logical reasoning-based problems.
Write good resumes and cover letters.
Engage confidently in group discussions.
Conduct interviews effectively.

5.5EC203E02 – Embedded Systems

5.5EC251E02 – Embedded Systems Lab

5.5EC204E02 – Fibre Optics

5.5EC205E02 – VLSI Design & Technology

5.5EC252E02 – VLSI Design Lab

5.5EC206E02 – Probability and Stochastic Processes

5.5EC207E02 – Satellite Communication

5.0CE202C01 – Operating Systems

Define the concepts of OS such as processes, threads, IPC, deadlocks, memory, I/O, file, and disk management.
Realize scheduling, IPC issues, memory management, and I/O operations.
Implement memory allocation methods to optimize usage and access time.
Analyze scheduling algorithms, IPC, deadlocks, memory and I/O systems.
Assess performance of scheduling, concurrency, file systems, and directory structures.
Design I/O management functions and synchronization between CPU and I/O controllers.

5.5EC208E02 – Microwave Theory and Techniques

5.0FLFR200E03 – French II

5.0FLGR200E03 – German II

5.0FLSP200E03 – Spanish II

Semester 7

6.0EC151C06 – Summer Internship-III

GP-EC-700 – General Proficiency

6.0EC152C06 – Project Phase-II / Industrial Project

5.5CE200E02 – Machine Learning

6.0EC153E02 – Advanced Communication Lab

6.0EC101E02 – Digital CMOS VLSI Design

6.0EC102E02 – Robotics

6.0EC103E02 – Radar & Navigation

6.0EC154E02 – Robotics Lab

6.0EC104E02 – AI & IoT for Practitioners using NVIDIA Jetson Nano Board

6.0EC155E02 – AI & IoT Lab for Practitioners using NVIDIA Jetson Nano Board

6.0EC105E02 – IoT Analytics & Security

Semester 8

6.0EC251C06 – Internship

6.0CE106E02 – Data Science

Identify a flow process for data science problems.
Classify data science problems into common typologies.
Plot result versus solution strategy employed.
Design use cases for checking the methodology and finding changes needed.
Develop R codes to tackle data science.
Assess the effectiveness of the solution methodology.

6.0EE201E03 – PLC & Data Acquisition

6.0CE201E02 – Computational Linguistics and Natural Language Processing

Define the ideas of Natural Language Understanding and the various levels of Language Analysis.
Define Morphological Analysis and the Lexicon.
Define the behavior of some parsing algorithms.
Use Lexicon theory to understand grammar.
Analyze WordNet theory in terms of language usage.
Design Indian language systems.

6.0EC200E02 – Image Processing and Applications

6.0EC201E02 – Biomedical Electronics

6.0EC202E02 – Nanotechnology

6.0EC203E02 – UVM Verification with Universal Verification Methodology (UVM)

5.0EC207C01 – Introduction to Microfabrication

5.0EC256C01 – Microfabrication Lab Introduction

5.5EC107C01 – Digital Design Based on Verilog

5.5EC153C01 – Verilog Based Digital Design Lab

5.5EC203C01 – Verification by System Verilog

5.5EC252C01 – Design Verification Using System Verilog Lab

5.5EC204C01 – Semiconductor Device Modeling

6.0EC109C01 – VLSI Verification and Testing

6.0EC159C01 – VLSI Verification and Testing Laboratory

6.0EC110C01 – Low Power VLSI Design

6.0EC251C06 – Internship

6.0CE106E02 – Data Science

Describe a flow process to data science problems.
Classify data science problems into common typologies.
Link results to the solution method used.
Develop use cases to test methods and assess changes required.
Develop R codes for data science solution.
Assess efficiency of the solution approach.

6.0EE201E03 – PLC & Data Acquisition

6.0CE201E02 – Computational Linguistics and Natural Language Processing

Define the basic concepts of Natural Language Understanding and different levels of language analysis.
Define Morphological Analysis and the Lexicon.
Define the behavior of different parsing algorithms for languages.
Interpret the grammar using the assistance of Lexicon theory.
Assess WordNet theory from languages' point of view.
Develop Indian languages' systems.

6.0EC200E02 – Image Processing and Applications

6.0EC201E02 – Biomedical Electronics

6.0EC202E02 – Nanotechnology

6.0EC203E02 – UVM Verification with Universal Verification Methodology

5.0EC207C01 – Introduction to Microfabrication

5.0EC256C01 – Introduction to Microfabrication Lab

5.5EC107C01 – Digital Design Using Verilog

5.5EC153C01 – Digital Design Using Verilog Lab

5.5EC203C01 – Design Verification Using System Verilog

5.5EC252C01 – System Verilog Based Design Verification Lab

5.5EC204C01 – Semiconductor Device Modelling

6.0EC109C01 – VLSI Verification and Testing

6.0EC159C01 – VLSI Verification and Testing Lab

6.0EC110C01 – Low Power VLSI Design

Curriculum Highlights

Our Top Recruiters

Internship & Placement Opportunities

The B.Tech ECE (Lateral Entry) programme with specialisation in VLSI and Embedded Systems / Communication Systems offers a robust industry interface to ensure career-readiness:

Diverse Internship Options:Students gain hands-on experience through internships at semiconductor design firms, embedded system companies, telecom industries, and chip verification labs.
Core Electronics Job ProfilesGraduates are eligible for core roles such as VLSI Design Engineer, Embedded Systems Developer, FPGA Engineer, ASIC Design Engineer, and Communication Systems Engineer.
Recruitment by Leading Core CompaniesTop recruiters include Synopsys, Cadence, Qualcomm, NXP Semiconductors, Texas Instruments, MediaTek, Broadcom, and Mentor Graphics.
Telecom & Embedded System RolesCareer paths extend into 5G, IoT, and embedded system solutions with companies like Tejas Networks, C-DOT, Samsung R&D, and Bosch.
Government & Public Sector OpportunitiesGraduates are eligible for technical roles in prestigious organisations such as ISRO, DRDO, BEL, BHEL, and other PSUs, especially in the fields of communication systems, chip design, and defence electronics.

Why pursue?

The B-Tech in Electronics and Communication Engineering (Lateral Entry) courses in Artificial Intelligence and Internet of Things (AI and IoT) reinforces your understanding of electronics and gets you ready to pursue an ever-growing world of digital technology. The course instructs for technical roles in Electronics and Computer Sciences. This course includes hands-on experience with industry leaders such as Intel and NVIDIA, which gives you experience working with intelligent systems, embedded computing, and development and use of connected devices. The units will evolve based on future technologies as well as allowing courses to investigate innovative ideas when it comes to smart cities, IoT security, edge computing, and AI-enabled embedded systems. Our goal is not only to place students into pure technical roles, but also into opportunities in Indian Engineering Services (IES) and many more. The support in careers not only enhances the student's academic potential and trajectories; it and our connections, help enhance all other career pathways and opportunities through support, placements, and links with key employers (such as Aluminium & Non-ferrous, AI & IoT, Aerospace, Defence, etc).

Placement Support

B.Tech ECE (Lateral Entry) students have placed in companies from communication, VLSI, and IT sectors. Major placements are Srinidhi at Lumiq, Haryana (₹8 LPA), Anuvart Kumar at Sahasra (₹4 LPA), Simran at KPMG (₹4 LPA), Saurav Gosain at EvalueServe, Haryana (₹5 LPA), Manjudha Sai Lakshmi at Vivo, Greater Noida (₹4.2 LPA), Vishnu Vardhan, and Alekhya at Launched (₹5 LPA). Students have also been placed in companies such as Cadence, Sagedel., and even IIT Delhi.

To enable skill building, workshops, and training sessions on tools such as LAM Simulator, Synopsys, and Cadence are held. Capstone projects are executed in Embedded Systems, IoT, Wireless Communication, Signal and Image Processing, and VLSI Design. Students also perform research in Communication Systems, IoT Security, and Biomedical Engineering.

Capstone Project & Research

The curriculum includes hands-on workshops and skill-oriented sessions using tools such asthe LAM Simulator, Synopsys, and Cadence Software for practical learning. Such endeavors have aided in situating theoretical knowledge into actuality for these students. The Capstone Projects constitute an important part of the academic experience, carrying out hard-hitting solutions to industry-oriented problems in Embedded Systems, IoT, Wireless Communication, Signal/Image Processing, and VLSI Design. Research activities are under way-including the institute's faculty and student members-in Communication Systems, IoT Security, Artificial Intelligence, and Biomedical Engineering.

Placement Statistics

Around 75% of students have got placed in reputed companies in core electronics, IT, and communication sectors.

Global Exposure

The programme is geared towards giving students the opportunity for international certification or higher studies and specialised training to fulfil their dreams of undertaking global career prospects.

Innovation & Startups

Manav Rachna Business Incubator assists students, alumni, and faculty with an inclination towards research, innovation, and entrepreneurship. Besides today's state-of-the-art design, fabrication, and prototyping facilities, it also provides mentoring, investor networking, and various training programs. Furthermore, the incubation centre takes care of all regulatory, financial, and administrative work, allowing early-stage ventures to grow sustainably.

Alumni Network

The alumni network of the B.Tech. ECE is growing and contributing across fields. Aditya Aggarwal and Robin Singh are Design Engineers at Intel, California. Arpit Miglani is part of the Google hardware design team. Akshay Angaria is Hub Manager for GSAT19 at ISRO. The programme has also grown successful in creative fields, with Yashu Meel pursuing choreography while Sumit Kumar is engaged with the film industry as an actor and director.

Student Achievements

The B.Tech ECE (Lateral Entry) students have made outstanding achievements in both academic and extracurricular fields. Anuvrat Kumar and Kartik Kachhawa have won the national round of the Microsoft Imagine cup 2023. Some students got opportunities for internships and future placements with reputed companies like Ms. Boddu Alekhya and Mr. Pasupuleti Brahma Viskhu Vardhan with Launched, Mr. Abhishek Verma with Sagedel, and Mr. Yechuri Manjunadha with Vivo. Mr. Mohammad Saad has cleared the GATE 2025. Many teams were awarded at the university's annual technical festival Innoskill 2025: Mr. Manikanta, Mr. Dogga Hema Prasad and Mr. Eshwar bagged the Srijan 2nd prize, Mr. Prashant's team won the 1st prize in Vista Vibes and Mr. Prashant Chauhan and Mr. Jay Deekshith won the second prize alongside his team. Mr. Samarth Dhiman and Mr. Vansh Vishi won 1st Prize in the 'Build a Circuit' competition while the team of Mr. T. Venkata Uma Mahesh, Mr. K. Eswar, Mr. Vignesh Karumuri, Mr. Surya Nikhil, and Mr. D. Charan won the 2nd prize.

Best Practices

The department is engaged in promoting internships during academic breaks to assist students with problem-solving abilities and industry experience. A structured mentoring scheme is in place, where each faculty member is allocated a bundle of 30 students to track their academic performance and offer advice as needed. Furthermore, students are included in a tree plantation drive as part of the orientation programme addressing the Go Green initiative, which increases awareness of the environment and society.

Fee Details for B.Tech Electronics and Communication Engineering (ECE Lateral Entry)

Course Fee (Annual): INR 1,92,700 US $ 4000
Duration: 3 Years
Brochure (PDF)

Modes of Payment

Online Payment: Via net banking, debit/credit card, or UPI through the university's official payment portal.
Bank Transfer: NEFT/RTGS to the university’s designated bank account.
Demand Draft (DD): In favor of “Manav Rachna International Institute of Research and Studies”, payable at Faridabad/New Delhi
Cash Payment: At the Accounts Office on campus (subject to limits as per government regulations).
Education Loan: Through tie-ups with banks like PNB, SBI, HDFC, and ICICI, offering easy financing options.

Residential Facilities & Transport

We at Manav Rachna offer generous residential facilities and convenient transportation services so that each student, including those studying Manav Rachna, gets to enjoy a safe, comfortable, and fulfilling campus life.

Residential Services

MREI provides on-campus and off-campus hostel facilities for boys and girls with various types of rooms. Students can choose single, double, and triple rooms as per their preference.

Key Points

Room Types: The hostels offer different types of rooms to suit different budgets and preferences:

Air-conditioned and non-air-conditioned rooms
Single-seater, two-seater, three-seater, and five-seater rooms
The rooms can be equipped with attached or common toilets as per the choice of room category.

Fee Structure: The hostel fee is to be paid on the basis of the room category chosen by the student and it can be paid through DD (Demand Draft) or in cash.

Additional Facilities:

Medical services and medical insurance to keep the students fit.
Library facilities for access to study materials and academic inputs.
Laundry facilities as included in the hostel fees, to ease the life of students.

Mess Plan

At Manav Rachna, we offer world-class sports facilities to keep our students fit and active. Our facilities comprise a range of outdoor and indoor games, including:

Sports

Mess plan also comes as part of hostel fee. Healthy food is served through the mess considering the multicultural requirements of different food habits for the students. By providing choices involving vegetarian as well as non-vegetarian options, healthy lifestyle is available for the students enabling them to pursue their studies focusing on programs with full seriousness.

Basketball, volleyball, cricket, soccer, chess, and carom among others.

Notable facilities include:

A 25m shooting range and a 10m air-conditioned indoor shooting range with Olympic-standard SIUS Ascor electronic targets.
Indoor badminton and table tennis stadia with synthetic courts in association with Yonex and Stag.
A Semi-Olympic pool for swimming and a Soccer Academy for students who have sporting interest and passion.
A Sports Fitness Centre to service psychological, physiotherapy, and other aspects of health for students.

The facilities enable students to pursue physical exercises that complement their academic development.

Laundry

Laundry facilities are available at an extra fee in the hostel fees. This saves students from worrying about laundry, so they can focus on their studies, and also allows their clothes to remain properly cleaned.

Parking

There is a vast parking space facility available for students who commute using their own means of transport. It is provided to cater to the requirements of students, so that their travel will be easy and hassle-free.

Transport

Our well-maintained transport facility offers a stress-free, secure, and safe journey for students from Delhi and Gurugram. The GPS-located, contemporary fleet of buses is operated by professionally trained personnel, with onboard support staff to assist students. Our emphasis is on reliability, safety, and convenience, ensuring unproblematic travel to and from the campus.

How to Apply for B.Tech Electronics and Communication Engineering (ECE Lateral Entry)

Manav Rachna offers a unique educational experience that combines academic excellence, practical exposure, and industry partnerships to equip students with the skills needed for real-world success.

1

Go to the Official Website
2

Complete the Online Application Form
3

Upload Mandatory Documents
4

Pay the Application Fee
5

Appear for MRNAT or Submit JEE Score

Step 1 - Go to the Official Website

Step 2 - Complete the Online Application Form

Click on "Apply Now," generate your login credentials, and fill out the form with your personal, educational, and contact information.

Step 3 - Upload Mandatory Documents

Upload scanned copies of the necessary documents, such as:
Class 10 & 12 mark sheets
Aadhaar card
Passport-size photos

Step 4 - Pay the Application Fee

Fill in the application by paying online using net banking, debit/credit card, or UPI.

Step 5 - Appear for MRNAT or Submit JEE Score

Get qualified through MRNAT (Manav Rachna National Aptitude Test) or produce a valid JEE Main score for merit-based admission.

PO's and PSO's

Program Outcomes (PO's)

PO1

Engineering knowledge: Apply the knowledge of mathematics, science, engineering fundamentals, and an engineering specialization to the solution of complex engineering problems.

PO2

Problem analysis: Identify, formulate, review research literature, and analyze complex engineering problems reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering sciences.

PO3

Design/development of solutions: Design solutions for complex engineering problems and design system components or processes that meet the specified needs with appropriate consideration for the public health and safety, and the cultural, societal, and environmental considerations.

PO4

Conduct investigations of complex problems: Use research-based knowledge and research methods including design of experiments, analysis and interpretation of data, and synthesis of the information to provide valid conclusions.

PO5

Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern engineering and IT tools including prediction and modeling to complex engineering activities with an understanding of the limitations.

PO6

The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering practice.

PO7

Environment and sustainability: Understand the impact of the professional engineering solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable development.

PO8

Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the engineering practice.

PO9

Individual and team work: Function effectively as an individual, and as a member or leader in diverse teams, and in multidisciplinary settings.

P10

Environment and sustainability: Communicate effectively on complex engineering activities with the engineering community and with society at large, such as, being able to comprehend and write effective reports and design documentation, make effective presentations, and give and receive clear instructions.

P11

Environment and sustainability: Demonstrate knowledge and understanding of the engineering and management principles and apply these to one’s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments.

P12

Environment and sustainability: Recognize the need for and have the preparation and ability to engage in independent and life-long learning in the broadest context of technological change.

Program Specific Outcomes (PSO's)

PSO1
Connect learning from Core and Disciplinary/Interdisciplinary elective courses of Electronics and Communication Engineering to assimilate technological advancements in the field for analyzing and designing subsystem processes to arrive at the solution to real world problems.

PSO2
Acquire hardware and software skills pertinent to research and industry practices in the field of Electronics & Communications while acquiring soft skills like persistence, proper judgment through projects and industrial interactions.

PSO4
Ability to identify indigenous processes and components for producing high quality, compact, energy efficient and eco-friendly solutions at affordable prices for existing and new applications directly and indirectly related to Electronics & Communication industry.

PSO5
Focus on acquiring right blend of aptitude and attitude so as to be the candidate of first choice for placements and higher education or to become a successful Entrepreneur and a worthy global citizen.